Director - Physical Design
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Location:San Jose, California, US
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Area of InterestEngineer - Hardware
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Compensation Range211600 USD - 314200 USD
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Job TypeProfessional
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Technology Interest*None
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Job Id1418857
- Closely work with Team Leads to Build PD Execution Schedule and Track Milestones through the Project.
- As a Soc Physical Design Lead, you will work closely with Architecture/Package/PD Teams to develop, craft, and optimize floor-plans during early chip development to meet Power/Performance/Area Goals for the SoC.
- Drive the review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities.
- Build tools and improve existing infrastructure to optimize chip area and speed of execution.
- Interact with Design team to review constraints.
- Collaborate with Cross Functional Teams across geographies.
- Drive SoC Physical Design Implementation in Advanced Process Nodes with world class team of Physical Design, Circuit design, DFT and integration engineers.
- Build a team of hard-working and passionate leaders as we scale.
- Develop Soc Execution Schedule and Milestone Tracking.
- Communicate Status and Risks to Senior Management.
- Expert understanding of both FE and BE ASIC flows.
- Maintain close interactions with RTL, NPI, Packaging, DFT, Architecture teams.
- Own power, performance and area optimization of design.
- Oversee the development of new automation utilities for improved quality, time to delivery and high-quality Designs.
- Conduct periodic design reviews - with deep technical dives - to make sure the project is tracking to the schedule and maintaining a high quality of work.
- EMIR analysis and Timing signoff closure.
- Demonstrable management experience in leading a team that does SoC and Physical Design.
- Drive ASIC design methodology and flow from concept to release.
- Previous demonstrated experience at leading and managing large ASIC developments in advanced process nodes.
- Demonstrable hands-on experience in ASIC design.
- Knowledge of industry standard PnR and signoff tools and their capabilities.
- Understands the big picture and attention to detail during execution.
- Prior Experience in developing Physical Design execution Schedule.
- Knowledge and hands on experience in block level synthesis, place and route, timing closure.
- Understanding advanced power analysis and power integrity analysis.
- Knowledge of scripting languages Tcl, Python.
- Manage Static Timing Analysis, timing closure and design constraints.
- Self-motivated, able to work in a highly cross functional team.
- MS or Bachelor’s in Electrical Engineering or Computer Science.
When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings. Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday, plus a day off for their birthday. Employees accrue up to 20 days of Paid Time Off (PTO) each year and have access to paid time away to deal with critical or emergency issues without tapping into their PTO. We offer additional paid time to volunteer and give back to the community. Employees are also able to purchase company stock through our Employee Stock Purchase Program.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:
.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.